VLSI Fundamentals A Practical Approach Education Kit



VLSI Fundamentals: A Practical Approach Education Kit covers the fundamentals of Very Large-Scale Integration (VLSI) design, including how the theories and concepts can be applied in the design of simple logic circuits and in the physical implementation of a simplified microprocessor.

Organisations: Arm Education

Target Audience

University students studying in computer science, electronic engineering or other engineering related degrees. Hobbyists, early-career professionals. Makers. Lecturers.

Learning Aims:

  • Knowledge and understanding of

    • The characteristics of the nonideal transistor due to high field effects, channel length modulation, threshold voltage effects and leakage
    • How to estimate the characteristics of CMOS circuits including noise margins, DC response and RC delay models.
    • How to estimate the resistance and capacitance of on-chip wires and describe methods to optimize wire delay, power consumption and crosstalk in on-chip wires.
    • The operation of CMOS latches and flip-flops and plan cell layouts using stick diagrams.
    • The limits imposed by timing constraints such as setup and hold time, propagation and contamination delays in sequential circuits.
    • The importance of testing in chip design and the concepts of stuck-at fault, Automatic Test Pattern Generation, Built in Self Test.
    • The different SRAM architecture.
    • The sources of power dissipation in a circuit and methods to control power losses.
    • The implications of clock distribution networks on skew and clock power consumption.
    • The sources and effects of on-chip variation.
    • How to simulate a circuit using Simulation Program with Integrated Circuit Emphasis (SPICE) to determine its DC transfer characteristics, Transient response and Power consumption.
  • Intellectual

    • Outline the key characteristics/features of nMOS and pMOS transistors and draw the cross section of a CMOS inverter.
    • Use plots and cross section diagrams to describe the current and voltage (I-V) characteristics of the MOS device when operating in cut off, linear and saturation regions.
    • Describe the effects of technology scaling on the number and cost of transistors power dissipation in devices.
    • Explain logical effort and show how it can be applied in minimizing the delay of a combinational circuit path.
    • Explain and demonstrate techniques used to optimize combinational logic circuits for best critical paths and best delay/power trade-offs for logic gates.
    • Describe and explain the features of different adder architectures including: Carry-Ripple Adder, Carry-Skip Adder, Carry-Lookahead Adder, Carry-Select Adder, Carry-Increment Adder and Tree Adder.
    • Design and describe the operation of data path circuits such as comparators, shifters, multi-input adders and multipliers.
    • Describe the operation of Electrostatic discharge (ESD) protection circuits using their circuit diagram.
    • Describe the implementation of a simplified processor at abstraction levels including: Architecture, Microarchitecture, Logic Design, Circuit Design, Physical Design, Verification & Test.
  • Practical

    • Design, implement, simulate, and verify simple logic gates from transistor level schematic to layout.
    • Use NC-Verilog to simulate and verify the operation of logic blocks.
    • Use design compiler to synthesize logic gates from hardware description language and use SOC Encounter to place and route logic design.
    • Assemble a chip from schematic, layout, add pad frame and then tape out in GDSII format.

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[thumbnail of Module_1_intro.pptx]
Module 1: Introduction
[thumbnail of Getting_Started.docx]
Module 1: Introduction: Getting Started Lab Manual
[thumbnail of Module_2_cktlay.pptx]
Module 2: Circuit & Layout
[thumbnail of LAB_1.docx]
Module 2: Circuit & Layout: Lab Manual
[thumbnail of Module_3_processorEx.pptx]
Module 3: Simple Processor Example
[thumbnail of Module_4_transistors.pptx]
Module 4: CMOS Transistor Theory
[thumbnail of Module_5_nonideal.pptx]
Module 5: Non-ideal Transistor Theory
[thumbnail of Module_6_dctran.pptx]
Module 6: DC & Transient Response
[thumbnail of Module_7_logicaleffort.pptx]
Module 7: Logical Effort
[thumbnail of LAB_2.docx]
Module 7: Logical Effort: Lab Manual
[thumbnail of Module_8_power.pptx]
Module 8: Power
[thumbnail of Module_9_scaling.pptx]
Module 9: Scaling
[thumbnail of Module_10_spice.pptx]
Module 10: SPICE Simulation
[thumbnail of Module_11_comb.pptx]
Module 11: Combinational Circuit Design
[thumbnail of LAB_3.docx]
Module 11: Combinational Circuit Design: Lab Manual
[thumbnail of Module_12_seq.pptx]
Module 12: Sequential Circuit Design
[thumbnail of Module_13_wires.pptx]
Module 13: Wires
[thumbnail of Module_14_adders.pptx]
Module 14: Adders
[thumbnail of Module_15_datapath.pptx]
Module 15: Datapath Functional Units
[thumbnail of Module_16_sram.pptx]
Module 16: SRAM
[thumbnail of Module_17_clocking.pptx]
Module 17: Clocking
[thumbnail of LAB_4.docx]
Module 17: Clocking: Lab Manual
[thumbnail of Module_18_pitfalls.pptx]
Module 18: Pitfalls
[thumbnail of Module_19_test.pptx]
Module 19: Test
[thumbnail of Module_20_custom.pptx]
Module 20: Packing, I/O & Power Distribution
26 resources for this course

VLSI Fundamentals: A Practical Approach Education Kit covers the fundamentals of Very Large-Scale Integration (VLSI) design, including how the theories and concepts can be applied in the design of simple logic circuits and in the physical implementation of a simplified microprocessor.

Course Type: Open


Organisations: Arm Education

Contributors:GitHub Contributor:Oyinkuro Benafa
GitHub Contributor:Liz Warman
GitHub Contributor:David Mackenzie
GitHub Contributor:Francis Catan


Course Structure


Interests: Asynchronous Circuit , Asynchronous Circuit , Radio Frequency Design , Radio Frequency Design


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